The present invention relates to an image display apparatus featuring excellent uniformity in display luminance, even in the case of a relatively large screen size.
Hereinafter, conventional techniques will be described by referring to FIGS. 11 and 12.
FIG. 11 is a configuration diagram of a liquid crystal display device as a first prior art employing a conventional technique. Arranged in a display section in a matrix configuration are a plurality of pixels 205 each of which has a liquid crystal capacitance 204 optical properties of which are controlled by an applied electric field. The pixels 205 are mutually connected via gate lines 206 and signal lines 207. One end of each of the gate lines 206 is terminated as a gate line terminal 208, and one end of each of the signal lines 207 is terminated as a signal line terminal 209. In each of the pixels 205, the signal line 207 is connected to one terminal of the liquid crystal capacitance 204 via an input TFT (Thin-Film-Transistor) 201, and a gate of the input TFT 201 is connected to the gate line 206. Although omitted in FIG. 11, all the other terminals of the liquid crystal capacitance 204 of all the pixels are connected together to form a common electrode and are connected to the same power supply. The above structure is provided on a glass substrate 200.
In the following, operation of the first prior art will be described. The gate line terminals 208 are connected to an external gate line driver IC (Integrated Circuit), and the gate line driver IC scans the gate lines 206 successively. Here, the signal line terminals 209 are connected to an external signal line driver IC, and the signal line driver IC applies signal voltages to the signal lines 207 in specified timing. The gate line driver IC opens or closes the input TFTs 201 in an intended pixel row via the gate lines 206 such that the signal voltages supplied to the signal lines 207 from the signal line driver IC are input into and retained in the liquid crystal capacitances 204. With this configuration, each of the liquid crystal capacitances 204 can produce an optical display in accordance with a corresponding of the signal voltages. Such prior art has been used most typically as a configuration of an active matrix liquid crystal display device using amorphous Si.
Next, a second prior art will be described by referring to FIG. 12.
FIG. 12 is a configuration diagram of a light emitting display device as the second prior art. Pixels 215 each provided with an organic light emitting diode (OLED) element 214 as a light emitting element are arranged in a display section in a matrix configuration Here, the OLED is sometimes referred to as an organic EL (electroluminescent) element, but it shall be referred to simply as an OLED element hereunder for simplification.
The pixels 215 are mutually connected via gate lines 216, signal lines 217, power supply lines 220, etc. Both ends of the gate lines 216 are connected to gate line scanning circuits 218 on the right and left sides of the gate lines 216, respectively. One end of each of the signal lines 217 is connected to a signal input circuit 219. One end of each of the power supply lines 220 is terminated as a power supply input terminal 225 via a power supply bus 221. An input line group 222 to the gate line scanning circuit 218 and an input line group 223 to the signal input circuit 219 are respectively bundled together to be connected to a gate-line-scanning-circuit input terminal group 224 and a signal-input-circuit input terminal group 226, respectively.
In each of the pixels 215, the signal line 217 is connected to one terminal of a pixel capacitance 212 and a gate of a drive TFT 213 via an input TFT 211, while the other terminal of the pixel capacitance 212 and a source terminal of the drive TFT 213 are connected to the power supply line 220. A drain terminal of the drive TFT 213 is connected to a common power supply terminal (omitted in FIG. 12) via the OLED element 214. Here, the input TFT 211 and the drive TFT 213 are formed of polycrystalline Si TFTs. The aforementioned structure is disposed on a glass substrate 230.
In the following, operation of the second prior art will be described. When display data fed by the signal-input-circuit input terminal group 226 are written into the signal line 217 via the signal input circuit 219, the gate line scanning circuit 218 successively selects the gate lines 216 based upon drive signals fed from the gate-line-scanning-circuit input terminal group 224 in synchronization with the above-stated writing. Thereby, the signal voltage fed to the signal line 217 is input into the pixel capacitance 212 and the gate of the drive TFT 213 of a corresponding one of the pixels 215 in a selected one of the gate lines 216 via the input TFT 211 of the corresponding one of the pixels 215, and the signal voltage is retained in the pixel capacitance 212. In the pixel 215, the drive TFT 213 is driven according to the signal voltage thus written, and thereby the OLED element 214 emits light of a specified luminance.
Such prior art is described in detail in Japanese Patent Application Laid-Open No. 2002-14653, etc., for example.